
Thomas Conte
VerifiedGeorgia Institute of Technology · Computer Science
Active 1989–2025
About
Thomas Conte is the current Associate Dean for Research for the College of Computing at the Georgia Institute of Technology. He holds a joint appointment in the Schools of Computer Science and Electrical & Computer Engineering. His research focuses on computer architecture and compiler optimization, with an emphasis on exploring novel and post-Moore methods of computing. Conte is the past founding director of the Center for Research into Novel Computing Hierarchies and has contributed significantly to the field through his research activities. He has held leadership roles such as the 2015 President of the IEEE Computer Society and is a fellow of the IEEE. In 2012, he co-founded the IEEE Rebooting Computing Initiative, further demonstrating his active engagement in advancing computing research and innovation.
Research topics
- Computer science
- Parallel computing
- Embedded system
- Computer architecture
- Multimedia
Selected publications
ASDF: A Compiler for Qwerty, a Basis-Oriented Quantum Programming Language
ArXiv.org · 2025-01-22
preprintOpen accessSenior authorQwerty is a high-level quantum programming language built on bases and functions rather than circuits. This new paradigm introduces new challenges in compilation, namely synthesizing circuits from basis translations and automatically specializing adjoint or predicated forms of functions. This paper presents ASDF, an open-source compiler for Qwerty that answers these challenges in compiling basis-oriented languages. Enabled with a novel high-level quantum IR implemented in the MLIR framework, our compiler produces OpenQASM 3 or QIR for either simulation or execution on hardware. Our compiler is evaluated by comparing the fault-tolerant resource requirements of generated circuits with other compilers, finding that ASDF produces circuits with comparable cost to prior circuit-oriented compilers.
A Blueprint for Q-CS1, an Introductory Quantum Programming Course
2025-02-18
articleOpen accessSenior authorDespite the need to build a quantum workforce, current courses that introduce quantum programming are rooted in quantum notation that students may find intimidating. We propose Q-CS1, a quantum equivalent of CS1 that begins with hands-on quantum programming. Q-CS1 is enabled by the Qwerty quantum programming language, which allows for reasoning about qubit behavior without physics notation or quantum circuits. An outline of Q-CS1 is provided along with plans for assessing its effectiveness.
RASSM: Residue-based Acceleration of Single Sparse Matrix Computation via Adaptive Tiling
2025-02-06 · 1 citations
articleOpen accessSenior authorASDF: A Compiler for Qwerty, a Basis-Oriented Quantum Programming Language
2025-02-22 · 2 citations
articleOpen accessSenior authorQwerty is a high-level quantum programming language built on bases and functions rather than circuits. This new paradigm introduces new challenges in compilation, namely synthesizing circuits from basis translations and automatically specializing adjoint or predicated forms of functions. This paper presents ASDF, an open-source compiler for Qwerty that answers these challenges in compiling basis-oriented languages. Enabled with a novel high-level quantum IR implemented in the MLIR framework, our compiler produces OpenQASM 3 or QIR for either simulation or execution on hardware. Our compiler is evaluated by comparing the fault-tolerant resource requirements of generated circuits with other compilers, finding that ASDF produces circuits with comparable cost to prior circuit-oriented compilers.
Qwerty: A Basis-Oriented Quantum Programming Language
2025-08-30
articleSenior authorQuantum computers have leaped from the theoretical realm into a race to large-scale implementations. This is due to the promise of revolutionary speedups, where achieving such speedup requires designing an algorithm that harnesses the structure of a problem using quantum mechanics. Yet many quantum programming languages today require programmers to reason at a low level of physics notation and quantum gate circuitry. This presents a significant barrier to entry for programmers who have not yet built up an intuition about quantum gate semantics, and it can prove to be tedious even for those who have. In this paper, we present Qwerty, a new quantum programming language that allows programmers to manipulate qubits more expressively than gates and trace programs without bra-ket notation. Due to its novel basis type and easy interoperability with Python, Qwerty is a powerful framework for high-level quantum-classical computation.
Enabling Multi-threading in Heterogeneous Quantum-Classical Programming Models
arXiv (Cornell University) · 2023-01-27 · 1 citations
preprintOpen accessSenior authorIn this paper, we address some of the key limitations to realizing a generic heterogeneous parallel programming model for quantum-classical heterogeneous platforms. We discuss our experience in enabling user-level multi-threading in QCOR as well as challenges that need to be addressed for programming future quantum-classical systems. Specifically, we discuss our design and implementation of introducing C++-based parallel constructs to enable 1) parallel execution of a quantum kernel with std::thread and 2) asynchronous execution with std::async. To do so, we provide a detailed overview of the current implementation of the QCOR programming model and runtime, and discuss how we add 1) thread-safety to some of its user-facing API routines, and 2) increase parallelism in QCOR by removing data races that inhibit multi-threading so as to better utilize available computing resources. We also present preliminary performance results with the Quantum++ back end on a single-node Ryzen9 3900X machine that has 12 physical cores (24 hardware threads) with 128GB of RAM. The results show that running two Bell kernels with 12 threads per kernel in parallel outperforms running the kernels one after the other each with 24 threads (1.63x improvement). In addition, we observe the same trend when running two Shor's algorthm kernels in parallel (1.22x faster than executing the kernels one after the other). Furthermore, the parallel version is better in terms of strong scalability. We believe that our design, implementation, and results will open up an opportunity not only for 1) enabling quicker prototyping of parallel/asynchrony-aware quantum-classical algorithms on quantum circuit simulators in the short-term, but also for 2) realizing a generic heterogeneous parallel programming model for quantum-classical heterogeneous platforms in the long-term.
Enabling Multi-threading in Heterogeneous Quantum-Classical Programming Models
2023-05-01 · 2 citations
articleSenior authorWhile quantum computers enable significant performance improvements for certain classes of applications, building a well-defined programming model has been a pressing issue. In this paper, we address some of the key limitations to realizing a generic heterogeneous parallel programming model for quantum-classical heterogeneous platforms. We discuss our experience in enabling user-level multi-threading in QCOR [1] as well as challenges that need to be addressed for programming future quantum-classical systems. Specifically, we discuss our design and implementation of introducing C++-based parallel constructs to enable 1) parallel execution of a quantum kernel with std::thread and 2) asynchronous execution with std::async. To do so, we provide a detailed overview of the current implementation of the QCOR programming model and runtime, and discuss how we add 1) thread-safety to some of its user-facing API routines, and 2) increase parallelism in QCOR by removing data races that inhibit multi-threading so as to better utilize available computing resources. We also present preliminary performance results with the Quantum++ [2] back end on a single-node Ryzen9 3900X machine that has 12 physical cores (24 hardware threads) with 128GB of RAM. The results show that running two Bell kernels with 12 threads per kernel in parallel outperforms running the kernels one after the other each with 24 threads (1.63× improvement). In addition, we observe the same trend when running two Shor’s algorthm kernels in parallel (1.22× faster than executing the kernels one after the other). Furthermore, the parallel version is better in terms of strong scalability. We believe that our design, implementation, and results will open up an opportunity not only for 1) enabling quicker prototyping of parallel-aware quantum-classical algorithms on quantum circuit simulators in the short-term, but also for 2) realizing a generic parallel programming model for quantum-classical heterogeneous platforms in the long-term.
Status Update on the IEEE Rebooting Computing Initiative
2023-07-05
article1st authorCorrespondingIt's been 10 years since the IEEE launched the Rebooting Computing Initiative (RCI) with the intention to re-examine all levels of how we compute. Back then, the term “post-Moore” was just coming into vogue. The RCI held several invitation-only summits and then opened the doors to others by launching the International Symposium on Rebooting Computing. Through the intervening years, many new ideas in how to rethink our computing levels of abstraction have been proposed. This paper examines some of those proposals, discusses their current status, and reviews the road ahead
The Invention of Electronic Digital Computing - Plenary Panel Summary
2023-07-05 · 1 citations
articleThe main goal of this plenary panel at IEEE SERVICES 2023 is to review John Vincent Atanasoff's revolutionary invention of electronic digital computing. It will serve as a tribute to this pioneer's exceptional accomplishments and as a celebration of Atanasoff's 120 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sup> birthday. Back in 1939, the first proof-of-concept prototype of electronic digital computer became operational. The plenary panel discussion will recognize the contributions of John Vincent Atanasoff for the invention and early development of electronic digital computing and computers that changed the world.
“Smarter” NICs for faster molecular dynamics: a case study
2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS) · 2022-05-01 · 14 citations
articleOpen accessThis work evaluates the benefits of using a “smart” network interface card (SmartNIC) as a compute accelerator for the example of the MiniMD molecular dynamics proxy application. The accelerator is NVIDIA's BlueField-2 card, which includes an 8-core Arm processor along with a small amount of DRAM and storage. We test the networking and data movement performance of these cards compared to a standard Intel server host using microbenchmarks and MiniMD. In MiniMD, we identify two distinct classes of computation, namely core computation and maintenance computation, which are executed in sequence. We restructure the algorithm and code to weaken this dependence and increase task parallelism, thereby making it possible to increase utilization of the BlueField-2 concurrently with the host. We evaluate our implementation on a cluster consisting of 16 dual-socket Intel Broadwell host nodes with one BlueField-2 per host-node. Our results show that while the overall compute performance of BlueField-2 is limited, using them with a modified MiniMD algorithm allows for up to 20% speedup over the host CPU baseline with no loss in simulation accuracy.
Recent grants
SHF: Small: Parallel Pattern Driven Adaptive Manycore Computer Architectures
NSF · $400k · 2012–2015
Confidence in Computer Architecture Modeling and Simulation
NSF · $151k · 2005–2008
Frequent coauthors
- 266 shared
Elizabeth Burd
- 264 shared
Cecilia Metra
Los Alamitos Medical Center
- 247 shared
Jill Gostin
American University of Beirut
- 198 shared
John Walz
AES (United Kingdom)
- 195 shared
David S. Ebert
- 190 shared
Anne Kelly
- 187 shared
Eric Berkowitz
Los Alamitos Medical Center
- 185 shared
Christina Schober
Los Alamitos Medical Center
Education
- 1992
Ph.D., Electrical and Computer Engineering
University of Illinois at Urbana-Champaign
- 1988
MSEE, Electrical and Computer Engineering
University of Illinois Urbana-Champaign
- 1986
Bachelors of Electrical Engineering, Electrical Engineering
University of Delaware
Awards & honors
- 2015 President of the IEEE Computer Society
- Fellow of the IEEE
- Co-founder of the IEEE Rebooting Computing Initiative (2012)
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