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Nova · Professor Researcher · re-ranking top 20…
Nader Sehatbakhsh

Nader Sehatbakhsh

· ProfessorVerified

University of California, Los Angeles · Electrical and Computer Engineering

Active 2013–2026

h-index12
Citations519
Papers4326 last 5y
Funding$1.8M3 active
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About

Nader Sehatbakhsh is an Assistant Professor in the Department of Electrical and Computer Engineering at UCLA Samueli School of Engineering. His research interests include Security and Privacy, Computer Architecture, IoT/Embedded Systems Security, and Side-Channels. He is involved in advancing knowledge and solutions in these areas, contributing to the academic community through his teaching and research activities at UCLA.

Research topics

  • Computer Science
  • Computer Security
  • Embedded system
  • Engineering
  • Computer hardware
  • Telecommunications
  • Electrical engineering
  • Parallel computing
  • Electronic engineering
  • Operating system
  • Computer network
  • Computer architecture

Selected publications

  • TIRA: Task-Based Intermittent Remote Attestation

    2026-05-08

    articleOpen accessSenior author

    Intermittent computing platforms powered by energy harvesting enable sustainable sensing and embedded intelligence in environments without reliable power. Recent advances support robust, task-based execution that tolerates frequent failures and ensures correct event-driven concurrency without the need for costly checkpointing. However, these systems lack basic security features, particularly remote attestation, undermining trust in adversarial or safety-critical settings.

  • Attest Like Software: Formally-Verified Software-Programmable Proof of Execution Architecture Using SoC FPGAs

    2026-02-05

    articleOpen accessSenior author

    Proof of Execution (PoX) enables a remote verifier to confirm that a specific program executed fully, correctly, and without interference on a potentially compromised device. Existing PoX solutions typically rely on trusted execution environments (TEEs) or custom hardware extensions, which limit their applicability to legacy, cost-sensitive, or resource-constrained embedded platforms. Moreover, many prior designs compromise real-time availability by disabling interrupts, enforcing two-world execution models, or relying on heavyweight isolation mechanisms. These limitations make existing PoX approaches poorly suited for safety-critical cyber-physical systems (CPS), where timing guarantees and responsiveness are as important as security.

  • BISen: A Robust Framework for Efficient CNN Inference on <u>B</u> attery-Free <u>I</u> ntelligent <u>S</u> ensory Nodes

    IEEE Transactions on Computers · 2026-01-01

    articleOpen access

    We present BISen, a framework for efficient and reliable convolutional neural network (CNN) inference on battery-free, energy-harvesting IoT sensor nodes. Battery-powered deployments suffer from limited lifetimes, high replacement costs, and environmental impacts, problems that will intensify as IoT scales to billions of devices. Energy-harvesting nodes remove batteries but face intermittent power, resulting in frequent failures that corrupt the intermediate CNN state, require costly checkpointing and rollback, and amplify non-volatile memory (NVM) traffic under tight on-chip memory constraints, leaving little harvested energy for useful sensing and inference. BISen introduces a reactive intermittent execution model for CNN workloads on off-the-shelf ultra-low-power microcontrollers. An energy-aware state machine with a safe-stop mechanism halts execution before brownout, while selective checkpointing preserves only the minimal CNN state needed for forward progress. This enables seamless resumption across power cycles while sharply reducing NVM reads/writes and memory-access overheads. Across two commercial MCU+radio platforms, three real harvested power traces, and nine CNNs, BISen cuts NVM operations by up to 86.4%, reduces standby/load/store operations by up to 94.1%, 94.5%, and 90.7%, and improves sensing throughput by about 1.3−1.4× compared to a state-of-the-art reactive baseline under the same energy budget, enabling long-lived, battery-free, carbon-aware IoT deployments.

  • XR Devices Send WiFi Packets When They Should Not: Cross-Building Keylogging Attacks via Non-Cooperative Wireless Sensing

    2026-01-01

    articleOpen access

    3) Signal Processing 10s of meters

  • Developing new solutions for data provenance and deepfake detection using physics, hardware, and machine learning

    2025-05-29

    article1st authorCorresponding

    As generative machine learning and deepfakes become increasingly important, reliable methods for protecting data provenance and authenticity are essential. Current approaches for verifying data provenance often rely on cryptographic measures. While cryptography can ensure the authenticity of data, it cannot guarantee the honesty/correctness of the data itself; for instance, if a sensor is spoofed, the generated data may be false even before the cryptographic process takes place. This paper introduces this new attack surface, the Physical Layer. We show a real example of how such an attack can be conducted. We then explore various solutions to address this concern, including leveraging hardware, sensing, and physics.

  • Security Helper Chiplets: A New Paradigm for Secure Hardware Monitoring

    IEEE Computer Architecture Letters · 2025-01-01 · 1 citations

    articleSenior author

    Hardware-assisted security features are a powerful tool for safeguarding computing systems against various attacks. However, integrating hardware security features (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">HWSFs</i>) within complex System-on-Chip (SoC) architectures often leads to scalability issues and/or resource competition, impacting metrics such as area and power, ultimately leading to an undesirable trade-off between security and performance. In this study, we propose re-evaluating HWSF design constraints in light of the recent paradigm shift from integrated SoCs to chiplet-based architectures. Specifically, we explore the possibility of leveraging a centralized and versatile security module based on chiplets called <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">security helper chiplets</i>. We study the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">cost</i> implications of using such a model by developing a new framework for cost analysis. Our analysis highlights the cost tradeoffs across different design strategies.

  • Secure artificial intelligence at the edge

    Philosophical Transactions of the Royal Society A Mathematical Physical and Engineering Sciences · 2025-01-16

    article1st authorCorresponding

    Sensors for the perception of multimodal stimuli-ranging from the five senses humans possess and beyond-have reached an unprecedented level of sophistication and miniaturization, raising the prospect of making man-made large-scale complex systems that can rival nature a reality. Artificial intelligence (AI) at the edge aims to integrate such sensors with real-time cognitive abilities enabled by recent advances in AI. Such AI progress has only been achieved by using massive computing power which, however, would not be available in most distributed systems of interest. Nature has solved this problem by integrating computing, memory and sensing functionalities in the same hardware so that each part can learn its environment in real time and take local actions that lead to stable global functionalities. While this is a challenging task by itself, it would raise a new set of security challenges when implemented. As in nature, malicious agents can attack and commandeer the system to perform their own tasks. This article aims to define the types of systemic attacks that would emerge, and introduces a multiscale framework for combatting them. A primary thesis is that edge AI systems have to deal with unknown attack strategies that can only be countered in real time using low-touch adaptive learning systems.This article is part of the theme issue 'Emerging technologies for future secure computing platforms'.

  • Poster Abstract: RL-SEP: RL -Based S mart E xit Point Selection for Enhancing Energy Harvested System Longevity

    2025-05-04

    article

    RL-SEP is a reinforcement learning scheduler that optimizes neural network execution in energy-harvesting devices. By dynamically selecting quantization levels and early exit points, it improves active operation time by up to 11% over the reactive method while achieving 136% better accuracy-to-energy ratio and maintaining higher energy reserves. Testing on ResNet-18 and DenseNet-121 shows robust performance across various harvesting sources.

  • Solutions to Deepfakes: Can Camera Hardware, Cryptography, and Deep Learning Verify Real Images?

    arXiv (Cornell University) · 2024-07-04

    preprintOpen access

    The exponential progress in generative AI poses serious implications for the credibility of all real images and videos. There will exist a point in the future where 1) digital content produced by generative AI will be indistinguishable from those created by cameras, 2) high-quality generative algorithms will be accessible to anyone, and 3) the ratio of all synthetic to real images will be large. It is imperative to establish methods that can separate real data from synthetic data with high confidence. We define real images as those that were produced by the camera hardware, capturing a real-world scene. Any synthetic generation of an image or alteration of a real image through generative AI or computer graphics techniques is labeled as a synthetic image. To this end, this document aims to: present known strategies in detection and cryptography that can be employed to verify which images are real, weight the strengths and weaknesses of these strategies, and suggest additional improvements to alleviate shortcomings.

  • SCRIPT: A Multi-Objective Routing Framework for Securing Chiplet Systems against Distributed DoS Attacks

    2024-06-10 · 2 citations

    articleOpen accessSenior author

    Heterogeneous 2.5D integration enables seamless integration of chiplets, hence reducing design time and costs. Concerns arise when dealing with untrustworthy chiplets, emphasizing the need for dependable Network-on-Interposer (NoI). This paper introduces SCRIPT, a secure routing framework to mitigate Distributed Denial-of-Service (DDoS) attacks in chiplet systems. SCRIPT obscures predictable paths exploited by attackers, disrupting orchestrated attacks. SCRIPT considers chiplet trust and criticality and employs a multi-objective optimization technique to enhance NoI performance and reliability. Evaluations show that SCRIPT enhances NoI security by at least 64% against DDoS attacks.

Recent grants

Frequent coauthors

  • Alenka Zajić

    Georgia Institute of Technology

    16 shared
  • Milos Prvulović

    Georgia Institute of Technology

    15 shared
  • Justin Feng

    8 shared
  • Alireza Nazari

    Georgia Institute of Technology

    7 shared
  • Baki Berkay Yilmaz

    6 shared
  • Monjur Alam

    4 shared
  • Amin Hass

    Accenture (United States)

    4 shared
  • Timothy Jacques

    University of California, Los Angeles

    4 shared

Education

  • PhD, Computer Science

    Georgia Institute of Technology

    2020
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